Abstract: A hybrid high dynamic range AGC algorithm is proposed based on receiver application. The algorithm consists of RF feedforward and IF feedback algorithm, which is realized by field programmable gate array. Under the control of the algorithm, with RF switch, digitally controlled attenuator, detector and variable gain amplifier as the core device, an automatic gain with input dynamic range of 110 dB, sensitivity of -100 dBm and output power of -19 dBm is realized. Control loop.
0 Preface
Due to factors such as multipath fading, the signal power at the antenna end of the receiver may have fluctuations in excess of 60 dB [1]. The fixed dynamic range of the IF ADC is difficult to accurately sample such large dynamic signals. In order to enable the baseband to be correctly demodulated and decoded, the receiver needs to automatically adjust its gain according to the strength of the input signal to provide a relatively constant output for the subsequent stage. This function is implemented by the Automatic Gain Control (AGC) loop.
Commonly used AGC loops are divided into three types: feedforward AGC, feedback AGC, and hybrid AGC [2-4]. The feedforward AGC is characterized by open-loop control. The input signal power is detected and processed for gain adjustment. The feedback AGC is closed-loop control. The output power is compared with a reference value to obtain the power error. Control the size of the gain. The research in [3] shows that the feedforward AGC has a faster response speed, and its algorithm is simpler and uses less resources, so it has been widely used. However, due to its sensitive response characteristics, the feedforward AGC is prone to misalignment due to fluctuations in circuit parameters. The feedback AGC can achieve relatively stable control, but because of its closed-loop structure, the loop parameters need to be carefully confirmed, which brings certain challenges to the design. Hybrid AGC is a combination of feedforward and feedback, which combines the characteristics of both.
1 Hybrid AGC loop
The hybrid AGC ring routing RF feedforward AGC circuit and the intermediate frequency feedback AGC circuit are used in the receiver. As shown in Figure 1, the signal received by the antenna is fed into the RF detector through a certain coupling coefficient. The output voltage of the detector is converted into a digital quantity by the ADC, and then the single-pole double-throw switch and the numerical control on the control signal path are processed by the FPGA. An attenuator that controls the gain of the RF section. Among them, the Low Noise Amplifier (LNA) has a gain of 22 dB and the attenuation network has a gain of -10 dB. The RF signal is mixed with the local oscillator to obtain the intermediate frequency input signal IFIN. The IFIN is amplified by two stages of the same variable gain amplifier (VGA), and then the appropriate frequency is fed to the intermediate frequency detector through the coupler, and the detection is performed. The output voltage VIFDET is converted into a digital quantity by the ADC, and then processed by the FPGA. The processing result determines the output voltage of the DAC, thereby controlling the gain of the VGA. Where IFOUT represents the intermediate frequency output signal and VG is the control voltage of the VGA.
2 AGC algorithm
Before introducing the AGC algorithm, the design specifications of the loop are first described. As stated in the introduction, the designed AGC algorithm needs to meet the requirements of two different input signals. For constant envelope signals, the AGC single control time is less than 50 μs, the input dynamic range is not less than -95 dBm~5 dBm, and the output power is -19 dBm. For non-constant envelope signals, the output signal envelope is not distorted.
According to the AGC loop index, the overall algorithm shown in Figure 2 is designed, and it is noted that the envelope characteristics of the input signal can be learned externally in the system. When the loop starts, it first judges whether the input signal is a constant envelope signal. If yes, the fast AGC algorithm is executed. Otherwise, the slow AGC algorithm is executed, and the order is the first radio frequency and the intermediate frequency. After the IF AGC algorithm is executed, it returns to the RF AGC again after a certain time interval, and so on.
The RF feedforward AGC algorithm is shown in Figure 3. First, the RF channel sampling of the ADC is configured, and the number of samples is determined according to the envelope characteristics of the input signal. The average level is converted to the corresponding input power according to the characteristics of the coupler and the RF detector (Eq. (1)). Conditional judgment is performed on the detected input power to determine the state of the LNA and the digitally controlled attenuator. If the current determined state is consistent with the current circuit state, the configuration phase is skipped and the radio frequency AGC is skipped. Otherwise, the circuit is configured according to the determined state and ends.
The simulation results of the RF AGC algorithm are shown in Figure 4. When the RF input power changes from -95 dBm to 5 dBm, the RF output power varies from [-73 dBm, -8.2 dBm], and the fluctuation range of the input signal is 100. The dB is reduced to 64.8 dB.
On the basis of RF adjustment, the IF feedback AGC performs continuous precision control of the gain. The algorithm is shown in Figure 5. First, the initial value of the VGA control voltage VGint is assigned, and then the IF channel sampling times are determined according to the envelope characteristics of the input signal. And find the mean VIFDET, under the non-constant envelope input, there is a time interval of T1 seconds between the two samples. The gain Gain of the VGA in the IF AGC loop and the control voltage VG conform to the linear relationship shown in Equation (2) under normal operating conditions, wherein the unit of gain is dB and the unit of the control voltage is V.
According to the characteristics of the VGA device used, k in the equation (2) takes 50, and b takes -5. The intermediate frequency detector output voltage VIFDET and the intermediate frequency output power PIFOUT conform to the linear relationship of equation (3) in the normal working region, wherein the unit of the voltage is V, and the unit of the detected power is dBm. According to the detector and coupler characteristics can be obtained:
In the formula (3), k1 is taken as 0.05, and b1 is taken as 2.575.
In the IF AGC loop, if PIFN is used to indicate the IF input power and PIFOUT is the IF output power, the designed loop target is: When PMIN Based on the control target and the relationship shown in equation (4), the calculation formula of the judgment condition and control voltage VG in Fig. 5 is given, where VGint is the current control voltage of VGA, Max[] represents the maximum value operation, Min[] Indicates the minimum value operation. Since the detector only conforms to equation (3) within a certain range, it is necessary to determine a reliable detection voltage interval: [0.375 V, 2.75 V]. In this interval, it is considered that the detection voltage VIFDET represents the true output power. At this time, the AGC control is performed according to the method described in the formula (4); when the VIFDET is <0.375 V, the output power is considered to be small, and the VGA is required to be increased first. Control the voltage to increase the gain, make VIFDET in a confidence interval, and then re-determine; when VIFDET>2.75 V, you need to reduce the VGA control voltage to reduce the gain, and then judge again. The simulation results of the IF AGC algorithm are shown in Figure 6. The abscissa is the number of AGC executions. The IF input signal has a power range of -100 dBm to -10 dBm. When the input signal power is at [-79.04, -9.3]dBm, the VGA control voltage VG can be changed with the input power, the output power is kept at -19 dBm, and VIFDET and PIFOUT change synchronously to realize loop power control. aims. 3 algorithm implementation and testing According to Section 2, the hybrid AGC algorithm is implemented on the Xilinx Spartan 3E Series FGPA. The main components of the algorithm control include ADC, RF switch, digitally controlled attenuator and DAC. Among them, the RF and IF part share a 10-bit, 4-channel analog-to-digital converter ADS7954; the state of the single-pole double-throw switch is controlled by the single-bit high and low level of the FPGA output; the digitally controlled attenuator is 6 bit, 0.5 dB stepped RFSA2644 chip. The control voltage for the IF VGA is provided by a 12-bit DAC. The switching and sampling of the ADC channel, the attenuation value of the digitally controlled attenuator, and the output voltage of the DAC are all controlled by the FPGA through a Serial Peripheral Interface (SPI) bus. In order to facilitate the processing of the digital part, the sampling times N1, N2, N3, and N4 in the proposed algorithm take an integer power of two. The functional simulation results of Modelsim under different input excitation conditions are shown in Fig. 7. When the input is a constant envelope signal (Fig. 7(a)), the ADC RF channel is first configured, and the RF channel sampling is performed four times. After calculation, the numerical control attenuator is configured. Due to the high input power, the LNA is always turned off and then the VGA gain is preset. Then configure the ADC to switch to the IF channel for 16 consecutive samples, and finally configure the DAC to output the appropriate VGA control voltage. A single AGC process with a constant envelope input signal takes 41.73 μs. When the input is a non-constant envelope signal (Fig. 7(b)), the RF AGC sample is changed to 64 times, and the IF AGC is still sampled 16 times, but a 6.68 μs interval is added between the samples, and the total control time is 230.53 μs. . The time domain input and output waveforms measured by the oscilloscope are shown in Figure 8. Channel 1 is the input sinusoidal envelope signal with an envelope period of 128 μs and channel 2 is the intermediate frequency output signal. It can be observed that the output signal envelope remains intact and average. The power is constant. The curve of the key parameters in the hybrid AGC loop with the RF input power is shown in Figure 9 under the condition that the input is a constant envelope signal. The curve fitted according to equation (1) in Fig. 9(a) agrees well with the measured curve; the VGA control voltage in Fig. 9(b) exhibits three-hop transition, which is consistent with the four conditional judgments designed in the RF AGC algorithm; Figure 9(c) and Figure 9(d) show that the designed AGC system has a constant output control of -19 dBm with a dynamic range of 110 dB at input signal power of -100 dBm~10 dBm. The dynamic range comparison of the proposed AGC system in recent years is shown in Figure 10 [5-16]. The comparison shows that the dynamic range achieved in this paper has a certain leading edge. 4 Conclusion In this paper, based on the different envelope characteristics of input signals, combined with the characteristics of feedforward and feedback AGC, a hybrid high dynamic range AGC algorithm is proposed based on the hardware architecture of the receiver, which is realized on the FPGA hardware platform. . Under the control of the algorithm, with RF switch, digitally controlled attenuator, detector and variable gain amplifier as the core device, an automatic gain with input dynamic range of 110 dB, sensitivity of -100 dBm and output power of -19 dBm is realized. Control loop. Under constant envelope and non-constant envelope inputs, the algorithm execution time is 41.73 μs and 230.53 μs, respectively, and the signal envelope remains intact. The comparison shows that the proposed AGC algorithm achieves excellent dynamic range characteristics. references [1] XIA G, ZHANG Q, YANG Z. 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[12] RAY S, HELLA M MA 10 Gb/s inductorless AGC amplifier with 40 db linear variable gain control in 0.13 um CMOS [J]. IEEE Journal of Solid-State Circuits, 2016, 51(2): 440-456. [13] TISSERAND E, BERVILLER Y. Design and implementation of a new digital automatic gain control [J]. Electronics Letters, 2016, 52(22): 1847-1849. [14] Luo Youliang, Wei Liankui, Liu Jie. Design of large dynamic range AGC circuit based on VCA810[J]. Electronic Design Engineering, 2016(4): 105-107,110. [15] Li Huailiang, Zhai Xianguo, Zhu Lili, et al. Design of medium and low frequency wide dynamic range AGC amplifier[J].Electrical Measurement & Instrumentation,2013,50(2):96-99. [16] He Xin. Broadband large dynamic AGC circuit design [J]. Electronic Design Engineering, 2012 (8): 167-170. 4000 puffs disposable vape pen are so convenient, portable, and small volume, you just need to take them
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