Exploration of Local Chip Industry and Technology Development in China

China's chip design industry status Wei Shaojun, executive vice president of China Semiconductor Industry Association IC Design Branch, said that China's integrated circuits (IC) grew rapidly in 2010, and the total industry sales in 2010 are expected to reach 55 billion yuan, up from 38 billion yuan in 2009. The dollar grew by about 45%. The share of the global design industry also rose from 10.7% in 2009 (global design sales in 2009 was about 56.6 billion US dollars, the US dollar exchange rate of 7.2) to 12.3% in 2010 (2010 global design industry sales forecast is about 700 Billion U.S. dollars, the US dollar exchange rate 6.36).

The entry threshold for the “Top Ten Design Enterprises” in 2010 will exceed RMB 1 billion for the first time. The number of design companies with sales of over 100 million yuan has reached 80, of which 2 companies have sales of over 2 billion yuan (about 300 million US dollars), which shows that they have formed a certain scale.

Although there are currently more than 500 design companies in China, most of them are small enterprises with less than 100 employees. They are still struggling for survival. The number of leading companies is relatively small. At present, there is still no one company that can enter the top 10 in the world. The sum of sales of the top 20 design companies in China is still unable to compare with the world’s highest ranking Qualcomm company.

Software becomes a new revenue model for semiconductor companies. So what are the challenges of the chip design industry today? What are the development ideas of local chip companies in China? This starts with the needs of terminal electronics.

John Bruggeman, senior vice president and chief marketing officer (CMO) at Cadence Design Systems, analyzed Apple’s success model. In 2009, Apple Computer changed its name to Apple Corp. [2], indicating that the positioning of the company is no longer a company selling computers, and it has started a new business model. Why Apple's iPhone is sought after? It is not because of the low power consumption, or the appearance and functionality, but because of the novelness of the iPhone. This is first and foremost manifested in many different applications; secondly, the iPhone has introduced a new business model through which business users can attract and retain users. The old business model is that if the company wants to generate revenue, it can only sell one mobile phone or sell its next generation to this user. This is a discrete business model. Looking around us, household appliances, cars, etc. are also such models.

Apple's new model is to allow customers to purchase applications or application-related content to continuously generate operating revenue. This new model is a continuous income model.

Many electronic companies are also following this model. For example, Samsung is now not only a TV supplier, but also is promoting the application of TV, and is becoming an application software company. Shenzhen Huawei is catching up with Cisco, not only providing network switches, but also positioning itself as an application-oriented company. As these complete machine companies are in transition, they are also forcing semiconductor device companies to undergo a transformation: not only to provide chips, but also to provide corresponding software services such as firmware and even underlying software for driving software.

Looking at the top 20 or 30 semiconductor companies in the world, about 50% of their investments are in software, so software has become a very important revenue model for semiconductor companies.

Academician Xu Juyan from the 58th CPI Group who had proposed the "Xu's Cycle" introduced his research on the semiconductor feature cycle. He thought that semiconductors or mainstream products always fluctuate along the "universal-special" basis, and they would cycle once every ten years. . It is now in the third cycle of the dedicated volatility cycle (2008-2018). The early academicians called it SoW (System on Wafer), which is now the SoC (System-on-Chip), and it will enter the user reconfigurability. (User-Reconfigurable) System-on-a-chip (U-SoC) is characterized by a general fluctuation period (2018-2028).

Synopsys’ chief operating officer and president, Chen Zhikuan, agrees with the upcoming U-SoC point of view and points out that the U-SoC stage will require more software. In addition, Synopsys speculated that in the future chip architecture, there will be 50% of memory, 25% of IP (intellectual property), and the remaining 25% will be fabless (design company)'s own innovation. This 50% of memory indicates that future chips require a lot of software.

Mentor Graphics not only continues to develop EDA tools for IC design, but also introduces ESA (Embedded Design Automation) platform for embedded system software. Dr. Andrew Moore, its Asia Pacific Technical Director, said that ESA provides a higher-level platform and tends to develop this software in a modular, high-level language. For example, the early DOS system controlled the x86 processor. Afterwards, everyone used PC software very diversified. The main reason is that the Windows platform provides higher-level languages ​​and can directly control these applications. Specifically, after disassembling high-level languages, you can see that its structure is layered, like a combination language, and the lowest level is assembly language/machine language. Today, ESA is developed for processor chips based on ARM and MIPS cores, and will build an ESA platform between processors and applications, enabling users to develop software from a higher level perspective.

The relationship between ESA and EDA (Electronic Design Automation) is complementary. The EDA tool is mainly used to assist in designing the hardware (IC), that is, designing some interfaces around the processor. In the future, the ESA software will run on the designed hardware. Therefore, the platform for EDA and ESA to serve the SoC is a hard and soft one.



Light design MTK also MTK

Dr. Weimin Wei, chairman and president of VeriSilicon, analyzed that the Taiwanese IC industry in China started later than in mainland China. If there was no foundry industry, there would be no world-class fabless such as MTK. . Because Taiwan's design companies and international IDM (integrated device manufacturer) giants are far from the scale. So how should mainland China break through according to its own conditions? One of the solutions is to leap from fabless to design-lite (light design).

Design-lite is probably derived from fab-lite (light manufacturing) popular three or four years ago. Light manufacturing means that IDM reduces its investment in manufacturing, focusing only on the manufacturing of certain special applications, and outsourcing the rest to foundries such as TSMC and SMIC. In contrast to light manufacturing, light design means that the design company focuses on specifications, architecture, core IP, and software, and outsources design implementation and supply chain management to design foundries (such as VeriSilicon). As SoCs prevail, the threshold for chip design companies continues to increase. System companies like Hanwang will move down to the value-added and differentiation of some of their key chips. In terms of system companies, their core competencies include brands and channels in addition to specifications and software.

Dai Weimin thinks this is another level of openness, MTK (open) than MTK. Because at present, many Chinese companies are pushing xPad. So who is the xPAD operator? It may be a Shenzhen company. However, some companies may not even write IP, why they will succeed? Because enclosure is more important than building a house! Not necessarily everyone wants to build a house to make money.

But why do iPad light design? Dai Weimin analyzed that the lesson of the mobile phone industry is that mobile phone design companies will fight and fight in the Red Sea, but they must all purchase MTK chips. However, the xPAD light design mode can help the user to customize, the chip does not need to do (and MTK also provides the user with the chip). Specifically, you can customize it for students, the elderly, migrant workers, medical terminals, automotive electronics, etc., because these differentiated applications cannot buy a large chip. You can go one step further - you don't even have a chip, use a design OEM.

Diversified and segmented markets are opportunities to be exceeded. Several experts including Xu Juyan, TSMC [5], Kei Yuan, and iSuppli believe that xPad is an opportunity for mainland China. Gu Wenjun, a senior analyst at iSuppli, came up with the gold medal from the hurdling project to think of how to find the advantages of Chinese companies. "We can't jump higher than whites, and sprinters can't run blacks. It's like if it's difficult to do PC components in mainland China - Taiwan is already in this market, and mobile phones are already MTK-led." Gu Wenjun said, "but xPad is not Can't get bigger or bigger, like a big screen smartphone or a small screen PC or netbook? It's like putting a few columns on a 100m runway, not the highest jump or the fastest, In this way, we have won the championship. Similarly, local companies need to look for opportunities from a diversified and segmented market.

However, xPAD needs to pay attention to two points. Dai Weimin of Keiyuan said that the first is the synchronization of the technology, for example, the competitor does 40nm, and you 65nm; the opponent uses the ARM Cortex-A9 core, and you use the ARM11. You can't do any more. Second, design creativity is needed to achieve a good user experience. There are many talents engaged in animation and art in China, but unfortunately they have not been concentrated in the electronics industry!

The design challenges in the eyes of the three major EDA giants: Cadence believes that software is a new challenge for semiconductor companies because they traditionally only design hardware and now design software. For this reason, Cadence referred to the new EDA transformation as EDA360 (Figure 1). EDA360 hopes to help semiconductor companies solve three levels of problems: 1, system implementation, including early software development, system-level verification and error correction; 2, SoC (system-on-a-chip) implementation to help customers solve problems like reware in SoCs Such as the development of the underlying software, and device-related software development; 3, chip implementation level, mainly to solve the traditional problems, including low power consumption.

Although Cadence has a complete platform from IC design to PCB (printed circuit board) and system design, it also needs the cooperation of the entire industry, such as IP suppliers, IP (intellectual property) and design service companies, foundries, and hardware related The software, which also includes Cadence's EDA counterparts.

Mentor's Andrew Moore believes that there are four important technologies to overcome the design challenges of large-scale ICs when the chip design scale is growing and it is expected to reach 40 billion transistors in the future.

First, hardware emulation. It is the use of hardware solutions to increase the efficiency of IC design and verification. This is logically a very interesting thing to do - use hardware to design the hardware, just as if the robot was designing a person himself. We use hardware to improve the effectiveness of the entire verification.

Second, system design. Numerous CPU cores are now being used in current SoC designs, such as ARM cores, MIPS cores, etc., and software and hardware co-simulation technology can greatly increase the efficiency of system design. First of all, we modeled the instruction set of these CPUs. After that, we do not need to use CPU-time RTL simulation for system-level simulation. We can model CPU instruction sets for some common commercial processors. This can greatly increase design efficiency. First, we improve the performance of the entire system-level verification simulation. Second, we can make software development earlier because it is equal to that we can implement the product prototype directly on the EDA platform. This software can be developed on this platform earlier. And EDA platform can improve the debugging ability, which is not achieved by the traditional hardware prototype. Because the software and hardware cooperation function can make the system clock stop, then when the software has a bug, it is easy to correct the error, and it is easy to know which CPU and which instruction cause hardware and software problems.

Third, physical design and verification. Mentor's Calibre platform has been integrated with automated place and route processes and physical verification processes, which can dramatically increase the speed of subsequent physical verification.



Fourth, the ESA opportunity. From the EDA design and subsequent tapeout/manufacture, in fact, despite the increase in the number of transistors, the manufacturing and R&D costs of the chip have not risen sharply. Instead, the cost of software development has been rising, for example, the iPhone has become increasingly mobile. The more applications come in. How to speed up software development and how can it reduce the cost of software development? Mentor's ESA vision is to solve this problem.

Chen Zhikuan of Synopsys pointed out that from an international perspective, the design challenge is: Design costs are getting higher and higher, and the largest cost expenditure comes from software and certification, which requires EDA vendors and foundries to solve together. The second is from chip design to simulation, verification and then to streaming. The time for software and verification accounted for more than half of the process, and it needs to focus on improving efficiency. The third is low-power design. Mainland China's IC design industry faces three challenges: It needs good IP, faster time-to-market, and lower cost.

Some people worry that IP will be used more, and fabless may become an assembly company. Synopsys, with an annual turnover of 250 million U.S. dollars, believes that in fact, how the entire system is validated is also very important. Only the designers of the project know what kind of functionality the chip will have to achieve before it can be verified; Cooperative verification of software and hardware is also complicated because the entire system is now on a chip (SoC). Furthermore, there will be a change in this five-year period: Conexant recently introduced a chip with 1 million lines of software code, but fabless designs the chip with probably no 1 million lines of RTL (Register Transfer Level). Code, so the chip's software is more complex than hardware. But the software in these chips is not done by outside application companies, but by chip vendors themselves.

Analog OEM: Reasonable process The most important digital circuit is the pursuit of mass production. The feature size of the chip is moving downwards, and the wafer size is increasing to pursue low cost. However, at the ICCAD annual conference, many analog foundries are still active. Processes such as 0.18/0.13 micron and 4/6/8 inch are still popular. The two 6-inch lines of Wuxi China Resources Shanghua are the pillars of its earnings. Dr. Zhuang Yuanqi, deputy general manager of marketing sales, explained that analog ICs are not seeking small but quasi-low power consumption. It is often said that analog IC design is actually an art that takes a long time to accumulate before it is very clear about the characteristics of the components. Improving performance can only come from his circuit design. Why do the 4 inch and 6 inch factories continue to survive internationally? And can I run twenty or thirty years? Why is there a high gross profit margin despite the high cost of tapeout? The main reason is that these analog line processes are completely matched with the design of the fabless, and no waste of any link is lost. So although many analog fabless in China do not have their own factories, they still have advantages compared with IDM.