Silk stripping series - a puzzle experience
The series of articles on the stripping and stripping series
Perforation selection of the series of stripping and stripping articles
The first two days, talking with a friend, is a big test in the field, they also run a self-media. Every time everyone provokes some sparks, the big cow will say, "Look, it's a good article." It seems that Daniel’s pressure to write articles is also very great. When I think of it, Xiao Chen can’t help but burst into tears and shake hands to make a slap in the neck.•••
The slot is going to spit, the article still has to be written. As we all know, doing some layout guide is one of the basic tasks of signal integrity engineers. The layout guide can be said to be the physical embodiment of some SI rules. A classmate found a layout guide like this:
Topology is like this
The request is like this
It can be seen that the main section M has only impedance requirements and no length requirements. The branch B1/B1'/B2/'B2' has only the length requirement and no impedance requirement. What is this?
First, we know that the drive impedance of most devices is low, which reduces the voltage division of the driver itself, although this will result in larger source reflections. When the rate is higher and higher, it is necessary to balance power consumption and signal integrity, and the driving impedance is gradually increased. The upper topology is DDR2, the driving impedance is usually around 33 ohms, and the impedance of the M segment is controlled at 33. Ohm means that the reflection at the source is very small, so that all the reflected signals entering the M segment to the driving end are all gone. The length of the M segment will not affect the signal at the receiving end, as shown below:
3
At the node where M and B/T meet, reflection is inevitable. The most important thing is the first reflection from M at this point, and the energy that is reflected back from the receiver for the first time. The energy of the reflected wave is very small due to partial pressure and reflection coefficient, etc., and can be ignored.
Let's first look at the reflection from M at this point for the first time. We know that the parallel impedance of several resistors must be less than the impedance of any of these resistors, and the transmission line is the same. If the impedance of the B segment is 60 ohms, the impedance seen from the M to the receiving end is 58//60//60 ≈ 20 ohms, and the reflection coefficient is 24%. If the impedance of the B segment is 40, the impedance seen from the M to the receiving end is 58. //40//40≈15 ohms with a reflection coefficient of 37%. The difference does not seem to be particularly large, so B does not have a clear impedance requirement, but in fact there is a sentence in the layout guide, that is, the B segment is as fine as possible.
Let's take a look at the energy that is reflected back from the receiving end for the first time. However, as we all know, in addition to the impedance and the length of the trace that affects the reflection, if the trace is short, the reflection will be submerged in the rise time. Let's look at the change in impedance when the line length meets the requirements:
It seems that as long as the branch length is guaranteed, the impedance effect is not large. Regarding various topologies, there are still a lot of magic changes. The layout guide is not only "x/x/x/x signal impedance control 50Ω".
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